GBTS Hardware description from Reiner Ziegler

The whole design is based on saving chips and connection efford. The Latch HC175 is used for storing the status and select lines for the UART. The free bit D3 is used for bankswitching of the flash chip. The clock pin should be selected in case of write to address A000hex. Means CS-U3 and WR is low. So I used CS-U3 for enabling (1G) of the 244 and after WR is going low the clock line will also go low. If only CS-U3 is going low the output of 1Y1(Clock) is tristated. I used a pullup resistor in order to avoid undefined states. Same procedure for read. With CS-U3 and RD low you can read the DataOut, ShutDown, second bank flash and IRQ status bits. If only CS-U3 is low, the pullup resistor at 1Y2 will force a high state at the second half of 244 (2G) and all outputs are tristated. So I used the 244 as a tristate output buffer and also for the chip select logic :-)

Read from 0xA000

D0 = DataOut from MAX3100 (UART)

D1 = Shutdown signal from UART            (active low)

D3 = status second bank of flash chip      (active high)

D7 = Interrupt ReQuest line from UART    (active low)

Write to 0xA000

D0 = chip select UART                            (active high)

D1 = Serial clock UART

D2 = DataIN UART

D3 = select second bank flash chip          (active high)

AM29F010

MAX3100

MAX3223

logic (2 HC chips)

Normal operating mode

30mA

1mA

1mA

 T.B.D.

Programming mode

50mA

1mA

1mA

 T.B.D.

Without external cable

30mA

1uA

1uA

 T.B.D.

When the MAX3223 sense no valid signal levels on all receiver inputs for 30us, the internal power supply and drivers for MAX3223 and MAX3100 are shut off, reducing supply current to 2uA for both chips. This occurs if the RS232 cable is disconnected or the connected peripheral transmitters are turned off. The system turns on again when a valid level is applied to any RS232 receiver input. As a result, the system saves power without changes to the existing GBTS software. 

A Philips low power CPLD or similar programmable logic device could be used to build a special MBCx. With this own bankswitching logic it's possible to use all banks of the 128KByte flashrom. The bankswitching address should be different from the standard MBC. Address 0x6000 should be fine. This will avoid problems coming from the flashchip programming sequence. The momentary sequence will use bank 0 and bank 1 for accessing the device. Newer (revision B) and larger chips won't have this problem.

The MAX3100's IrDA mode can be used to communicate with other IrDA 1.1 SIR-compatible devices. In this case the MAX3223 should be replaced with an infrared driver and receiver module.

The GBTS RS232 connector has the same pinning like a standard PC. A null-modem cable must be used to communicate with external hardware.

MAX3100CEE (UART chip)

MAX3223CAP (Converter RS232/TTL)

AM29F010-70JC (Flashchip from AMD)